Travelled to:1 × Germany
2 × France
Collaborated with:L.Benini E.Macii A.Pullini A.Macii M.Poncino G.D.Micheli A.Calimera
Talks about:cluster (2) transistor (1) framework (1) algorithm (1) interact (1) discharg (1) variabl (1) scalabl (1) present (1) nanomet (1)
Person: Ashoka Visweswara Sathanur
DBLP: Sathanur:Ashoka_Visweswara
Contributed to:
200920082007Wrote 3 papers:
- DATE-2009-SathanurPBMM #clustering #design #variability
- Physically clustered forward body biasing for variability compensation in nanometer CMOS design (AVS, AP, LB, GDM, EM), pp. 154–159.
- DATE-2008-SathanurPBMMP #algorithm #framework #scalability
- A Scalable Algorithmic Framework for Row-Based Power-Gating (AVS, AP, LB, AM, EM, MP), pp. 379–384.
- DATE-2007-SathanurCBMMP #bound #clustering #interactive #performance
- Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing (AVS, AC, LB, AM, EM, MP), pp. 1544–1549.