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Travelled to:
2 × USA
Collaborated with:
G.Malecha W.Taha J.Grundy J.O'Leary J.Gillenwater A.Y.Zhu
Talks about:
verilog (3) synthesiz (2) descript (2) static (2) level (2) check (2) type (2) use (2) interconnect (1) guarante (1)

Person: Cherif Salama

DBLP DBLP: Salama:Cherif

Contributed to:

PEPM 20092009
PEPM 20082008

Wrote 2 papers:

PEPM-2009-SalamaMTGO #consistency #dependent type #using
Static consistency checking for verilog wire interconnects: using dependent types to check the sanity of verilog descriptions (CS, GM, WT, JG, JO), pp. 121–130.
PEPM-2008-GillenwaterMSZTGO #hardware #static typing #using
Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability (JG, GM, CS, AYZ, WT, JG, JO), pp. 41–50.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.