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Travelled to:
4 × USA
Collaborated with:
S.Sutanthavibul S.Nahar S.Sahni R.Lin J.B.Rosen D.E.Krekelberg G.E.Sobelman L.Lin
Talks about:
placement (2) approach (2) layout (2) driven (2) anneal (2) simul (2) optim (2) time (2) combinatori (1) floorplan (1)

Person: Eugene Shragowitz

DBLP DBLP: Shragowitz:Eugene

Contributed to:

DAC 19921992
DAC 19911991
DAC 19901990
DAC 19861986
DAC 19851985

Wrote 7 papers:

DAC-1992-LinS #approach #fuzzy #logic #problem
Fuzzy Logic Approach to Placement Problem (RBL, ES), pp. 153–158.
DAC-1991-SutanthavibulS #predict
Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement (SS, ES), pp. 632–635.
DAC-1990-SutanthavibulS #adaptation #layout
An Adaptive Timing-Driven Layout for High Speed VLSI (SS, ES), pp. 90–95.
DAC-1990-SutanthavibulSR #approach #design #optimisation
An Analytical Approach to Floorplan Design and Optimization (SS, ES, JBR), pp. 187–192.
DAC-1986-KrekelbergSSL #automation #compilation #layout #synthesis
Automated layout synthesis in the YASC silicon compiler (DEK, ES, GES, LSL), pp. 447–453.
DAC-1986-NaharSS #combinator #optimisation
Simulated annealing and combinatorial optimization (SN, SS, ES), pp. 293–299.
DAC-1985-NaharSS
Experiments with simulated annealing (SN, SS, ES), pp. 748–752.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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