Travelled to:
1 × Germany
4 × USA
Collaborated with:
C.J.Alpert Z.Li N.Viswanathan K.A.Sakallah R.A.Rutenbar S.Lee J.Chae H.Kim A.J.Drake C.C.N.Sze N.Y.Zhou T.Jindal J.Hu C.B.Winn P.Villarrubia H.Ren C.C.N.Chu
Talks about:
system (2) detect (2) design (2) applic (2) acceleromet (1) placement (1) increment (1) dimension (1) structur (1) approach (1)
Person: Gi-Joon Nam
DBLP: Nam:Gi=Joon
Contributed to:
Wrote 5 papers:
- DAC-2012-LiANSVZ #design #physics #predict
- Guiding a physical design closure system to produce easier-to-route designs with more predictable timing (ZL, CJA, GJN, CCNS, NV, NYZ), pp. 465–470.
- DAC-2010-JindalAHLNW #detection #logic
- Detecting tangled logic structures in VLSI netlists (TJ, CJA, JH, ZL, GJN, CBW), pp. 603–608.
- DAC-2007-ViswanathanNAVRC #named #polynomial
- RQL: Global Placement via Relaxed Quadratic Spreading and Linearization (NV, GJN, CJA, PV, HR, CCNC), pp. 453–458.
- DAC-2001-LeeNCKD #2d #detection
- Two-Dimensional Position Detection System with MEMS Accelerometer for MOUSE Applications (SL, GJN, JC, HK, AJD), pp. 852–857.
- DATE-2001-NamSR #approach #incremental #satisfiability
- A boolean satisfiability-based incremental rerouting approach with application to FPGAs (GJN, KAS, RAR), pp. 560–565.