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Travelled to:
1 × Denmark
1 × Finland
1 × Germany
4 × France
4 × USA
Collaborated with:
B.Lin E.Verlind T.Kolks A.Niemegeers H.D.Man D.Verkest E.Verhulst V.Mezhuyev S.Vercauteren C.K.Lennard P.Schaumont A.Haverinen P.Hardee F.Thoen J.V.D.Steen G.Goossens D.Gajski E.Villar W.Rosenstiel V.Gerousis D.Barton J.Plantin S.E.Ericsson P.Cavalloro J.L.d.S.Jr. C.Ykman-Couvreur M.Miranda K.Croes S.Wuytack F.Catthoor P.Six
Talks about:
system (7) time (5) effici (4) asynchron (3) design (3) embed (3) real (3) synthesi (2) communic (2) partial (2)

Person: Gjalt G. de Jong

DBLP DBLP: Jong:Gjalt_G=_de

Contributed to:

FM 20082008
DATE 20022002
DATE 20012001
DATE 20002000
DAC 19981998
DATE 19981998
ED&TC 19971997
DAC 19961996
DAC 19951995
DAC 19941994
CAV 19911991

Wrote 13 papers:

FM-2008-VerhulstJM #case study #development #formal method #industrial
An Industrial Case: Pitfalls and Benefits of Applying Formal Methods to the Development of a Network-Centric RTOS (EV, GGdJ, VM), pp. 411–418.
DATE-2002-Jong #design #embedded #realtime #uml
A UML-Based Design Methodology for Real-Time and Embedded Sytems (GGdJ), pp. 776–779.
DATE-2001-GajskiVRGBPECJ #concurrent #specification
C/C++: progress or deadlock in system-level specification (DG, EV, WR, VG, DB, JP, SEE, PC, GGdJ), pp. 136–137.
DATE-2000-LennardSJHH #design #question #standard
Standards for System-Level Design: Practical Reality or Solution in Search of a Question? (CKL, PS, GGdJ, AH, PH), pp. 576–583.
DATE-2000-NiemegeersJ #embedded #incremental #realtime #specification
An Incremental Specification Flow for Real Time Embedded Systems (AN, GGdJ), p. 761.
DAC-1998-SilvaYMCWJCVSM #data transfer #performance #synthesis
Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer (JLdSJ, CYC, MM, KC, SW, GGdJ, FC, DV, PS, HDM), pp. 76–81.
DATE-1998-VercauterenVJL #analysis #partial order #performance #using #verification
Efficient Verification using Generalized Partial Order Analysis (SV, DV, GGdJ, BL), pp. 782–789.
EDTC-1997-ThoenSJGM #embedded #graph #multi #realtime #synthesis #thread
Multi-thread graph: a system model for real-time embedded software synthesis (FT, JVDS, GGdJ, GG, HDM), pp. 476–481.
DAC-1996-VerlindJL #analysis #performance
Efficient Partial Enumeration for Timing Analysis of Asynchronous Systems (EV, GGdJ, BL), pp. 55–58.
DAC-1995-LinJK #optimisation
Hierarchical Optimization of Asynchronous Circuits (BL, GGdJ, TK), pp. 712–717.
DAC-1994-JongL #communication #concurrent #design #petri net
A Communicating Petri Net Model for the Design of Concurrent Asynchronous Modules (GGdJ, BL), pp. 49–55.
DAC-1994-VerlindKJLM #abstraction #communication #performance #verification
A Time Abstraction Method for Efficient Verification of Communicating Systems (EV, TK, GGdJ, BL, HDM), pp. 609–614.
CAV-1991-Jong #approach #automaton #logic
An Automata Theoretic Approach to Temporal Logic (GGdJ), pp. 477–487.

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