BibSLEIGH corpus
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Open Knowledge
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Travelled to:
3 × USA
Collaborated with:
D.S.Ha K.Kim
Talks about:
circuit (3) stuck (3) fault (3) test (3) generat (2) effici (2) combin (2) open (2) cmos (2) synchron (1)

Person: Hyung Ki Lee

DBLP DBLP: Lee:Hyung_Ki

Contributed to:

DAC 19921992
DAC 19901990
DAC 19891989

Wrote 3 papers:

DAC-1992-LeeH #fault #named #parallel #performance
HOPE: An Efficient Parallel Fault Simulator for Synchronous Sequential Circuits (HKL, DSH), pp. 336–340.
DAC-1990-LeeH #automation #fault #generative #named #performance
SOPRANO: An Efficient Automatic Test Pattern Generator for Stuck-Open Faults in CMOS Combinational Circuits (HKL, DSH), pp. 660–666.
DAC-1989-LeeHK #fault #generative #testing #using
Test Generation of Stuck-open Faults Using Stuck-at Test Sets in CMOS Combinational Circuits (HKL, DSH, KK), pp. 345–350.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.