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Travelled to:
2 × France
2 × USA
Collaborated with:
G.G.E.Gielen K.Uyttenhove E.Lauwers M.Steyaert W.M.C.Sansen S.Donnay F.Leyn G.V.d.Plas W.Daems A.v.d.Bosch
Talks about:
design (4) systemat (3) convert (3) bit (3) interpol (2) down (2) interfac (1) hierarch (1) silicon (1) current (1)

Person: Jan Vandenbussche

DBLP DBLP: Vandenbussche:Jan

Contributed to:

DAC 20022002
DATE 20022002
DAC 20002000
DATE 19981998

Wrote 4 papers:

DAC-2002-VandenbusscheULSG #design
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter (JV, KU, EL, MS, GGEG), pp. 449–454.
DATE-2002-VandenbusscheLUSG #design
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter (JV, EL, KU, MS, GGEG), pp. 357–361.
DAC-2000-PlasVDBGS #design
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter (GVdP, JV, WD, AvdB, GGEG, WMCS), pp. 452–457.
DATE-1998-VandenbusscheDLGS #design #interface #specification #top-down
Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon (JV, SD, FL, GGEG, WMCS), pp. 716–720.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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