BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
1 × Germany
3 × USA
Collaborated with:
G.G.E.Gielen W.M.C.Sansen T.Eeckelaert G.V.d.Plas J.Vandenbussche A.v.d.Bosch
Talks about:
circuit (4) perform (3) analog (3) posynomi (2) generat (2) symbol (2) integr (2) model (2) characterist (1) nonlinear (1)

Person: Walter Daems

DBLP DBLP: Daems:Walter

Contributed to:

DATE 20032003
DAC 20022002
DATE 20022002
DAC 20002000
DAC 19991999

Wrote 5 papers:

DATE-2003-EeckelaertDGS #modelling #performance
Generalized Posynomial Performance Modeling (TE, WD, GGEG, WMCS), pp. 10250–10255.
DAC-2002-DaemsGS #modelling #performance
An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits (WD, GGEG, WMCS), pp. 431–436.
DATE-2002-DaemsGS #approach #linear #performance
A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics (WD, GGEG, WMCS), pp. 268–273.
DAC-2000-PlasVDBGS #design
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter (GVdP, JV, WD, AvdB, GGEG, WMCS), pp. 452–457.
DAC-1999-DaemsGS #analysis #complexity #reduction
Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits (WD, GGEG, WMCS), pp. 958–963.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.