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Travelled to:
1 × France
1 × Germany
Collaborated with:
J.A.Darringer A.J.Weger G.Luo C.L.Johnson P.Bose A.Buyuktosunoglu M.S.Gupta M.B.Healy H.M.Jacobson I.Nair J.A.Rivers A.Vega
Talks about:
chip (2) challeng (1) cockpit (1) pitfal (1) power (1) multi (1) manag (1) earli (1) plan (1) core (1)

Person: Jeonghee Shin

DBLP DBLP: Shin:Jeonghee

Contributed to:

DATE 20122012
DATE 20112011

Wrote 2 papers:

DATE-2012-BoseBDGHJNRSVW #challenge #manycore #power management
Power management of multi-core chips: Challenges and pitfalls (PB, AB, JAD, MSG, MBH, HMJ, IN, JAR, JS, AV, AJW), pp. 977–982.
Early chip planning cockpit (JS, JAD, GL, AJW, CLJ), pp. 863–866.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.