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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
J.A.Darringer J.Shin G.Luo C.L.Johnson R.Puri D.Varma D.Edwards P.D.Franzon A.Yang S.V.Kosonocky P.Bose A.Buyuktosunoglu M.S.Gupta M.B.Healy H.M.Jacobson I.Nair J.A.Rivers A.Vega
Talks about:
chip (3) hot (2) challeng (1) thermal (1) problem (1) cockpit (1) pitfal (1) power (1) multi (1) manag (1)

Person: Alan J. Weger

DBLP DBLP: Weger:Alan_J=

Contributed to:

DATE 20122012
DATE 20112011
DAC 20082008

Wrote 3 papers:

DATE-2012-BoseBDGHJNRSVW #challenge #manycore #power management
Power management of multi-core chips: Challenges and pitfalls (PB, AB, JAD, MSG, MBH, HMJ, IN, JAR, JS, AV, AJW), pp. 977–982.
DATE-2011-ShinDLWJ
Early chip planning cockpit (JS, JAD, GL, AJW, CLJ), pp. 863–866.
DAC-2008-PuriVEWFYK #problem #question
Keeping hot chips cool: are IC thermal problems hot air? (RP, DV, DE, AJW, PDF, AY, SVK), pp. 634–635.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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