Travelled to:1 × France
2 × USA
Collaborated with:Y.Xie X.Dong J.Zhan J.Ouyang F.Ge Sihang Liu 0001 Yizhou Wei Aasheesh Kolli S.M.Khan H.Cheng J.Sampson M.J.Irwin
Talks about:effici (2) design (2) test (2) core (2) dim (2) multiprocessor (1) framework (1) dimension (1) approach (1) silicon (1)
Person: Jishen Zhao
DBLP: Zhao:Jishen
Contributed to:
2015
20112010
2019Wrote 5 papers:
- DAC-2015-ChengZZ0SI
- Core vs. uncore: the heart of darkness (HYC, JZ, JZ, YX, JS, MJI), p. 6.
- DAC-2015-ZhanOGZ0 #approach #named #network #power management #towards
- DimNoC: a dim silicon approach towards power-efficient on-chip network (JZ, JO, FG, JZ, YX), p. 6.
- DATE-2011-ZhaoDX #3d #design #energy #fine-grained #scalability
- An energy-efficient 3D CMP design with fine-grained voltage scaling (JZ, XD, YX), pp. 539–542.
- DAC-2010-ZhaoDX #3d #cost analysis #design #manycore
- Cost-aware three-dimensional (3D) many-core multiprocessor design (JZ, XD, YX), pp. 126–131.
- ASPLOS-2019-0001WZKK #flexibility #framework #memory management #named #performance #persistent #source code #testing
- PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs (SL0, YW, JZ, AK, SMK), pp. 411–425.