Travelled to:
1 × Germany
6 × USA
Collaborated with:
V.Narayanan K.Swaminathan G.Venkatesh X.Li M.S.Kim S.Garcia S.Swanson M.B.Taylor Y.Xie K.Ma Y.Liu H.Cheng J.Zhan J.Zhao M.J.Irwin H.Liu N.Goulding-Hotta N.Chandramoorthy B.Sedighi R.Perricone N.Goulding V.Bryksin J.Lugo-Martinez W.Chuang S.Narayanasamy M.V.Biesbrouck G.Pokam B.Calder O.Colavin Y.Zheng S.Li Mahmut Taylan Kandemir Jinyang Li 0002 T.Wu Zhibo Wang Y.X.0001
Talks about:
architectur (3) nonvolatil (2) energi (2) comput (2) steep (2) slope (2) devic (2) core (2) fog (2) processor (1)
Person: Jack Sampson
DBLP: Sampson:Jack
Contributed to:
Wrote 8 papers:
- DAC-2015-ChengZZ0SI
- Core vs. uncore: the heart of darkness (HYC, JZ, JZ, YX, JS, MJI), p. 6.
- HPCA-2015-MaZLSLLS0N #architecture #energy
- Architecture exploration for ambient energy harvesting nonvolatile processors (KM, YZ, SL, KS, XL, YL, JS, YX, VN), pp. 526–537.
- DAC-2014-SwaminathanLLKSN #architecture #paradigm
- Steep Slope Devices: Enabling New Architectural Paradigms (KS, HL, XL, MSK, JS, VN), p. 6.
- DATE-2014-SwaminathanKCSPSN #architecture #modelling
- Modeling steep slope devices: From circuits to architectures (KS, MSK, NC, BS, RP, JS, VN), pp. 1–6.
- HPCA-2011-SampsonVGGST #performance
- Efficient complex operators for irregular codes (JS, GV, NGH, SG, SS, MBT), pp. 491–502.
- ASPLOS-2010-VenkateshSGGBLST #energy #maturity
- Conservation cores: reducing the energy of mature computations (GV, JS, NG, SG, VB, JLM, SS, MBT), pp. 205–218.
- ASPLOS-2006-ChuangNVSBPCC #bound #memory management #transaction
- Unbounded page-based transactional memory (WC, SN, GV, JS, MVB, GP, BC, OC), pp. 347–358.
- ASPLOS-2018-MaLKSN0WWL0 #named #optimisation
- NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing (KM, XL, MTK, JS, VN, JL0, TW, ZW, YL, YX0), pp. 782–796.