Travelled to:1 × USA
2 × France
3 × Germany
Collaborated with:D.Verkest F.Schirrmeister A.Ghosh S.Y.Liao B.Moyer J.Cornish C.Rowen E.Haritan Y.Tanurhan R.Wittmann M.Vanzi H.Wassener N.Nandra J.E.d.Franca C.Münker J.M.Rabaey D.Brophy R.Camposano D.Samani L.Lerner R.Hetherington H.Schlebusch G.Smith D.Sciuto D.Gajski C.Mielenz C.K.Lennard F.Ghenassia S.Swan
Talks about:design (3) transact (1) synthesi (1) buzzword (1) problem (1) hardwar (1) assembl (1) unless (1) system (1) signal (1)
Person: Joachim Kunkel
DBLP: Kunkel:Joachim
Contributed to:
201020072003
200220001999Wrote 6 papers:
- DATE-2010-MoyerKCRHT #assembly #question
- Are we there yet? Has IP block assembly become as easy as LEGO? (BM, JK, JC, CR, EH, YT), p. 123.
- DATE-2007-WittmannVWNKFM #question
- Life begins at 65: unless you are mixed signal? (RW, MV, HJW, NN, JK, JEdF, CM), pp. 936–941.
- DATE-2003-SchlebuschSSGMLGSK #design #problem #question #transaction
- Transaction Based Design: Another Buzzword or the Solution to a Design Problem? (HJS, GS, DS, DG, CM, CKL, FG, SS, JK), pp. 10876–10879.
- DAC-2002-RabaeyKBCSLH #question #what
- What’s the next EDA driver? (JMR, JK, DB, RC, DS, LL, RH), p. 652.
- DATE-2000-VerkestKS #c++ #design #using
- System Level Design Using C++ (DV, JK, FS), pp. 74–81.
- DATE-1999-GhoshKL #c #c++ #hardware #synthesis
- Hardware Synthesis from C/C++ (AG, JK, SYL), pp. 387–389.