Travelled to:2 × USA
Collaborated with:Y.Chang H.Ou H.Tsao
Talks about:capacitor (1) asynchron (1) templat (1) pipelin (1) perform (1) circuit (1) length (1) integr (1) analog (1) ratio (1)
Person: Kuan-Hsien Ho
DBLP: Ho:Kuan=Hsien
Contributed to:
20142013Wrote 2 papers:
- DAC-2014-HoC #optimisation #performance #pipes and filters
- A New Asynchronous Pipeline Template for Power and Performance Optimization (KHH, YWC), p. 6.
- DAC-2013-HoOCT #array
- Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits (KHH, HCO, YWC, HFT), p. 6.