Travelled to:2 × USA
Collaborated with:Y.Peng B.W.Ku Y.Park S.Jang J.Choi S.K.Lim J.Yang B.Kim S.Nam J.Cho S.Seo C.Ryu Y.Kwon D.Lee J.Lee J.Kim H.Yoon J.Kim K.Lee C.Hwang I.Kim J.S.Kim K.H.Park Y.H.Lee S.H.Hwang I.Park C.Kyung
Talks about:architectur (1) develop (1) system (1) specif (1) polici (1) packag (1) integr (1) design (1) applic (1) power (1)
Person: Kwang-Il Park
DBLP: Park:Kwang=Il
Contributed to:
20151998Wrote 2 papers:
- DAC-2015-PengKPPJCL #3d #architecture #design #policy
- Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM (YP, BWK, YSP, KIP, SJJ, JSC, SKL), p. 6.
- DAC-1998-YangKNCSRKLLKYKLHKKPPLHPK #development #named
- MetaCore: An Application Specific DSP Development System (JHY, BWK, SJN, JHC, SWS, CHR, YSK, DHL, JYL, JSK, HDY, JYK, KML, CSH, IHK, JSK, KIP, KHP, YHL, SHH, ICP, CMK), pp. 800–803.