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Travelled to:
1 × China
1 × France
1 × Germany
2 × USA
Collaborated with:
D.Gajski N.D.Dutt B.Gorjiara P.Mishra C.Cascaval S.Fowler P.Montesinos-Ortego W.Piekarski B.Robatmili M.Weber V.Bhavsar
Talks about:
simul (3) instruct (2) set (2) architectur (1) processor (1) interrupt (1) techniqu (1) protocol (1) parallel (1) multicor (1)

Person: Mehrdad Reshadi

DBLP DBLP: Reshadi:Mehrdad

Contributed to:

PPoPP 20132013
DAC 20082008
DATE 20072007
DATE 20052005
DAC 20032003

Wrote 5 papers:

PPoPP-2013-CascavalFMPRRWB #manycore #mobile #named #parallel #web
ZOOMM: a parallel web browser engine for multicore mobile devices (CC, SF, PMO, WP, MR, BR, MW, VB), pp. 271–280.
DAC-2008-ReshadiGG #case study #design #internet #protocol
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP) (MR, BG, DG), pp. 72–75.
DATE-2007-ReshadiG #architecture #embedded #low level #programming
Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems (MR, DG), pp. 1337–1342.
DATE-2005-ReshadiD #generative #modelling #performance #pipes and filters
Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation (MR, NDD), pp. 786–791.
DAC-2003-ReshadiMD #flexibility #performance #set #simulation
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation (MR, PM, NDD), pp. 758–763.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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