BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × China
1 × USA
Collaborated with:
M.Erez Bongjoon Hyun Youngeun Kwon Yujeong Choi J.Kim D.Li D.R.Johnson M.O'Connor D.Burger D.S.Fussell S.W.Redder
Talks about:
effici (2) architectur (1) throughput (1) processor (1) translat (1) prioriti (1) support (1) process (1) control (1) address (1)

Person: Minsoo Rhu

DBLP DBLP: Rhu:Minsoo

Contributed to:

HPCA 20152015
HPCA 20132013
ASPLOS 20202020

Wrote 3 papers:

HPCA-2015-LiRJOEBFR #throughput
Priority-based cache allocation in throughput processors (DL, MR, DRJ, MO, ME, DB, DSF, SWR), pp. 89–100.
HPCA-2013-RhuE #control flow #execution #gpu #performance
The dual-path execution model for efficient GPU control flow (MR, ME), pp. 591–602.
ASPLOS-2020-HyunKCKR #architecture #named #performance
NeuMMU: Architectural Support for Efficient Address Translations in Neural Processing Units (BH, YK, YC, JK, MR), pp. 1109–1124.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.