BibSLEIGH — Doug

Travelled to:

1 × China
1 × Germany
1 × Mexico
1 × United Kingdom
12 × USA

Collaborated with:

S.W.Keckler B.Robatmili K.S.McKinley A.Smith H.Esmaeilzadeh M.S.S.Govindan K.Strauss E.Ipek J.Condit E.B.Nightingale C.Kim W.Lin S.K.Reinhardt K.E.Coons D.Li A.Sampson L.Ceze R.Desikan S.Sethumadhavan J.Huh J.Chang G.S.Sohi J.R.Diamond B.A.Maher J.H.Burrill E.Koukoumidis D.Lymberopoulos J.Liu T.Moscibroda X.Chen S.K.Kushwaha T.Gao S.M.Blackburn J.R.Larus R.A.v.d.Geijn K.Goto M.Duric O.Palomar O.S.Ünsal A.Cristal M.Valero C.Frost B.C.Lee D.Coetzee M.Rhu D.R.Johnson M.O'Connor M.Erez D.S.Fussell S.W.Redder A.Putnam J.Gibson N.Nethercote B.Yoder M.Gebhart P.Gratz M.Marino N.Ranganathan

Talks about:

architectur (5) memori (5) edg (4) system (3) cach (3) processor (2) distribut (2) spatial (2) execut (2) reduc (2)

Person: Doug Burger

DBLP: Burger:Doug

Contributed to:

2015

2014

2013

2012

2011

2010

2009

2008

2006

2004

2002

2001

Wrote 17 papers:

HPCA-2015-LiRJOEBFR #throughput: Priority-based cache allocation in throughput processors (DL, MR, DRJ, MO, ME, DB, DSF, SWR), pp. 89–100.
DATE-2014-DuricPSUCVB #execution #named #power management: EVX: Vector execution on low power EDGE cores (MD, OP, AS, OSÜ, AC, MV, DB), pp. 1–4.
HPCA-2013-RobatmiliLEGSPBK #architecture #effectiveness #how #manycore #predict: How to implement effective prediction and forwarding for fusable dynamic multicore architectures (BR, DL, HE, MSSG, AS, AP, DB, SWK), pp. 460–471.
PLDI-2013-GaoSBMBL #runtime #smarttech #using: Using managed runtime systems to tolerate holes in wearable memories (TG, KS, SMB, KSM, DB, JRL), pp. 297–308.
ASPLOS-2012-EsmaeilzadehSCB #approximate #architecture #programming: Architecture support for disciplined approximate programming (HE, AS, LC, DB), pp. 301–312.
ASPLOS-2011-KoukoumidisLSLB: Pocket cloudlets (EK, DL, KS, JL, DB), pp. 171–184.
HPCA-2011-RobatmiliGBK #distributed: Exploiting criticality to reduce bottlenecks in distributed uniprocessors (BR, MSSG, DB, SWK), pp. 431–442.
ASPLOS-2010-IpekCNBM #memory management #reliability: Dynamically replicated memory: building reliable systems from nanoscale resistive memories (EI, JC, EBN, DB, TM), pp. 3–14.
ASPLOS-2009-GebhartMCDGMRRSBKBM #evaluation: An evaluation of the TRIPS computer system (MG, BAM, KEC, JRD, PG, MM, NR, BR, AS, JHB, SWK, DB, KSM), pp. 1–12.
SOSP-2009-ConditNFILBC #memory management #persistent: Better I/O through byte-addressable, persistent memory (JC, EBN, CF, EI, BCL, DB, DC), pp. 133–146.
PPoPP-2008-DiamondRKGGB #algebra #distributed #linear #performance: High performance dense linear algebra on a spatially distributed processor (JRD, BR, SWK, RAvdG, KG, DB), pp. 63–72.
ASPLOS-2006-CoonsCBMK #algorithm #architecture #scheduling: A spatial path scheduling algorithm for EDGE architectures (KEC, XC, DB, KSM, SKK), pp. 129–140.
CGO-2006-SmithGMNYBMB #architecture #compilation: Compiling for EDGE Architectures (AS, JG, BAM, NN, BY, DB, KSM, JHB), pp. 185–195.
ASPLOS-2004-DesikanSBK #architecture #scalability: Scalable selective re-execution for EDGE architectures (RD, SS, DB, SWK), pp. 120–132.
ASPLOS-2004-HuhCBS #using: Coherence decoupling: making use of incoherence (JH, JC, DB, GSS), pp. 97–106.
ASPLOS-2002-KimBK #adaptation: An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches (CK, DB, SWK), pp. 211–222.
HPCA-2001-LinRB #design #memory management: Reducing DRAM Latencies with an Integrated Memory Hierarchy Design (WFL, SKR, DB), pp. 301–312.