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Travelled to:
6 × USA
Collaborated with:
∅ J.Kim H.Shin K.Choe S.Chang K.Cheng M.Marek-Sadowska
Talks about:
technolog (2) synthesi (2) method (2) alloc (2) fpga (2) implement (1) backtrack (1) function (1) multipl (1) heurist (1)

Person: Nam Sung Woo

DBLP DBLP: Woo:Nam_Sung

Contributed to:

DAC 19941994
DAC 19931993
DAC 19911991
DAC 19901990
DAC 19891989
SLP 19861986

Wrote 6 papers:

DAC-1994-ChangCWM #layout #logic #synthesis
Layout Driven Logic Synthesis for FPGAs (SCC, KTC, NSW, MMS), pp. 308–313.
DAC-1993-WooK #clustering #implementation #multi #performance
An Efficient Method of Partitioning Circuits for Multiple-FPGA Implementation. (NSW, JK), pp. 202–207.
DAC-1991-Woo #heuristic
A Heuristic Method for FPGA Technology Mapping Based on the Edge Visibility (NSW), pp. 248–251.
DAC-1990-Woo #synthesis
A Global, Dynamic Register Allocation and Binding for a Data Path Synthesis System (NSW), pp. 505–510.
DAC-1989-WooS #adaptation #functional
A Technology-adaptive Allocation of Functional Units and Connections (NSW, HS), pp. 602–605.
SLP-1986-WooC86 #backtracking
Selecting the Backtrack Literal in the AND/OR Model (NSW, KMC), pp. 200–210.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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