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Travelled to:
1 × China
1 × France
1 × Germany
1 × United Kingdom
5 × USA
Collaborated with:
B.Franke H.Wagstaff S.C.Kyle I.Böhm M.Zuluaga E.V.Bonilla M.M.Fernandes J.Llosa T.Spink M.Gould R.V.Bennett A.C.Murray K.T.Sundararajan V.Porpodas T.M.Jones H.Leather T.J.K.E.v.Koch R.Leupers L.Eeckhout G.Martin F.Schirrmeister X.Chen
Talks about:
processor (4) translat (3) instruct (3) effici (3) binari (3) dynam (3) set (3) parallel (2) generat (2) region (2)

Person: Nigel P. Topham

DBLP DBLP: Topham:Nigel_P=

Contributed to:

LCTES 20142014
DAC 20132013
DATE 20122012
HPCA 20122012
LCTES 20122012
DATE 20112011
PLDI 20112011
LCTES 20072007
HPCA 19991999

Wrote 9 papers:

LCTES-2014-SpinkWFT #code generation #performance
Efficient code generation in a region-based dynamic binary translator (TS, HW, BF, NPT), pp. 3–12.
DAC-2013-WagstaffGFT #architecture #partial evaluation #set
Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description (HW, MG, BF, NPT), p. 6.
DATE-2012-ZuluagaBT #case study #design #predict #trade-off
Predicting best design trade-offs: A case study in processor customization (MZ, EVB, NPT), pp. 1030–1035.
HPCA-2012-SundararajanPJTF #clustering #energy
Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs (KTS, VP, TMJ, NPT, BF), pp. 311–322.
LCTES-2012-KyleBFLT #embedded #manycore #set #simulation #using
Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation (SCK, IB, BF, HL, NPT), pp. 21–30.
DATE-2011-LeupersEMSTC #manycore #towards
Virtual Manycore platforms: Moving towards 100+ processor cores (RL, LE, GM, FS, NPT, XC), pp. 715–720.
PLDI-2011-BohmKKFT #compilation #parallel #using
Generalized just-in-time trace compilation using a parallel task farm in a dynamic binary translator (IB, TJKEvK, SCK, BF, NPT), pp. 74–85.
LCTES-2007-BennettMFT #automation #embedded #set #text-to-text
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems (RVB, ACM, BF, NPT), pp. 83–92.
HPCA-1999-FernandesLT #distributed #scheduling
Distributed Modulo Scheduling (MMF, JL, NPT), pp. 130–134.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.