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Travelled to:
1 × USA
2 × France
Collaborated with:
S.Kundu S.Devadas G.Kurian A.Pan M.A.Kinsy I.Celanovic C.W.Fletcher L.Ren X.Yu M.v.Dijk
Talks about:
architectur (3) multiprocessor (2) system (2) chip (2) transistor (1) suppress (1) electron (1) thermal (1) softwar (1) reliabl (1)

Person: Omer Khan

DBLP DBLP: Khan:Omer

Contributed to:

HPCA 20142014
DATE 20132013
DATE 20092009

Wrote 6 papers:

HPCA-2014-FletcherRYDKD #information management #performance #ram #trade-off
Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs (CWF, LR, XY, MvD, OK, SD), pp. 213–224.
HPCA-2014-KurianDK #replication
Locality-aware data replication in the Last-Level Cache (GK, SD, OK), pp. 1–12.
DATE-2013-KinsyCKD #architecture #grid #named #smarttech
MARTHA: architecture for control and emulation of power electronics and smart grid systems (MAK, IC, OK, SD), pp. 519–524.
DATE-2009-KhanK #adaptation #architecture #self
A self-adaptive system architecture to address transistor aging (OK, SK), pp. 81–86.
DATE-2009-KhanK09a #architecture #co-evolution #design #hardware #multi
Hardware/software co-design architecture for thermal management of chip multiprocessors (OK, SK), pp. 952–957.
DATE-2009-PanKK #multi #reliability
Improving yield and reliability of chip multiprocessors (AP, OK, SK), pp. 490–495.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.