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Travelled to:
1 × USA
2 × France
2 × Germany
Collaborated with:
N.K.Jha L.Lingappan N.Karimi K.Chakrabarty S.Patil W.Zhang J.Huang S.Yang S.Ravi A.Raghunathan R.Zhang L.Zhong
Talks about:
circuit (3) nanotechnolog (2) generat (2) test (2) fingerprint (1) architectur (1) threshold (1) algorithm (1) synthesi (1) interfac (1)

Person: Pallav Gupta

DBLP DBLP: Gupta:Pallav

Contributed to:

DATE 20122012
DATE 20112011
DATE 20062006
DAC 20052005
DATE v2 20042004

Wrote 6 papers:

DATE-2012-KarimiCGP #fault #generative #testing
Test generation for clock-domain crossing faults in integrated circuits (NK, KC, PG, SP), pp. 406–411.
DATE-2011-ZhangHYG #case study #interface #reliability
Case study: Alleviating hotspots and improving chip reliability via carbon nanotube thermal interface (WZ, JH, SY, PG), pp. 1071–1076.
DATE-2006-GuptaJL #automaton #generative #quantum #testing
Test generation for combinational quantum cellular automata (QCA) circuits (PG, NKJ, LL), pp. 311–316.
DAC-2005-GuptaRRJ #authentication #embedded #performance
Efficient fingerprint-based user authentication for embedded systems (PG, SR, AR, NKJ), pp. 244–247.
DATE-v2-2004-GuptaJ #algorithm #architecture
An Algorithm for Nano-Pipelining of Circuits and Architectures for a Nanotechnology (PG, NKJ), pp. 974–979.
DATE-v2-2004-ZhangGZJ #logic #network #optimisation #synthesis
Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies (RZ, PG, LZ, NKJ), pp. 904–909.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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