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Travelled to:
1 × Canada
10 × USA
2 × France
Collaborated with:
D.A.Padua T.Nakatani H.Inoue H.Hayashizaki H.Wang A.E.Eichenberger G.Ren A.Wang K.O'Brien M.F.Spear M.M.Michael M.L.Scott J.Wu H.Xiong J.Chen M.J.Serrano X.Chen G.Zhang H.Wang R.Wu L.Zhang J.G.Castaños D.Edelsohn K.Ishizaki P.Nagpurkar T.Ogasawara K.Yotov X.Li M.Cibulskis G.DeJong M.J.Garzarán K.Pingali P.Stodghill
Talks about:
compil (5) base (5) trace (4) reduc (3) optim (3) simd (3) java (3) jit (3) interpret (2) overhead (2)

Person: Peng Wu

DBLP DBLP: Wu:Peng

Contributed to:

DATE 20152015
OOPSLA 20152015
CGO 20142014
OOPSLA 20122012
ASPLOS 20112011
CGO 20112011
OOPSLA 20112011
CGO 20092009
KDD 20072007
PLDI 20062006
CGO 20052005
PLDI 20042004
PLDI 20032003

Wrote 14 papers:

DATE-2015-ChenZWWWZ #multi #named #pseudo #simulation
MRP: mix real cores and pseudo cores for FPGA-based chip-multiprocessor simulation (XC, GZ, HW, RW, PW, LZ), pp. 211–216.
OOPSLA-2015-WangPW
Vectorization of apply to reduce interpretation overhead of R (HW, DAP, PW), pp. 400–415.
CGO-2014-WangWP #optimisation #reduction #virtual machine
Optimizing R VM: Allocation Removal and Path Length Reduction via Interpreter-level Specialization (HW, PW, DAP), p. 295.
OOPSLA-2012-CastanosEINNOW #compilation #jit #on the #scripting language #static typing
On the benefits and pitfalls of extending a statically typed language JIT compiler for dynamic scripting languages (JGC, DE, KI, PN, TN, TO, PW), pp. 195–212.
OOPSLA-2012-InoueHWN #adaptation #compilation #java #jit #multi
Adaptive multi-level compilation in a trace-based Java JIT compiler (HI, HH, PW, TN), pp. 179–194.
ASPLOS-2011-HayashizakiWISN #performance
Improving the performance of trace-based systems by false loop filtering (HH, PW, HI, MJS, TN), pp. 405–418.
CGO-2011-InoueHWN #compilation #java #jit
A trace-based Java JIT compiler retrofitted from a method-based compiler (HI, HH, PW, TN), pp. 246–256.
OOPSLA-2011-WuHIN #java #performance #scalability
Reducing trace selection footprint for large-scale Java applications without performance loss (PW, HH, HI, TN), pp. 789–804.
CGO-2009-SpearMSW #memory management #transaction
Reducing Memory Ordering Overheads in Software Transactional Memory (MFS, MMM, MLS, PW), pp. 13–24.
KDD-2007-WuWCX #analysis #composition
Local decomposition for rare class analysis (JW, HX, PW, JC), pp. 814–823.
PLDI-2006-RenWP #optimisation #permutation
Optimizing data permutations for SIMD devices (GR, PW, DAP), pp. 118–131.
CGO-2005-WuEW #code generation #performance #runtime
Efficient SIMD Code Generation for Runtime Alignment and Length Conversion (PW, AEE, AW), pp. 153–164.
PLDI-2004-EichenbergerWO #architecture #constraints
Vectorization for SIMD architectures with alignment constraints (AEE, PW, KO), pp. 82–93.
PLDI-2003-YotovLRCDGPPSW #comparison #empirical #modelling #optimisation
A comparison of empirical and model-driven optimization (KY, XL, GR, MC, GD, MJG, DAP, KP, PS, PW), pp. 63–76.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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