BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × USA
4 × France
5 × Germany
Collaborated with:
L.Ding B.Wang Q.Xu K.Chakraborty H.Esbensen J.Yih J.H.Patel W.K.Fuchs A.Gupta M.Bhattacharya S.Kulkarni
Talks about:
model (5) circuit (4) nois (4) algorithm (3) design (3) use (3) interconnect (2) transmiss (2) techniqu (2) parallel (2)

Person: Pinaki Mazumder

DBLP DBLP: Mazumder:Pinaki

Contributed to:

DATE 20092009
DATE 20062006
DATE 20052005
DAC 20042004
DATE 20032003
DATE 20022002
DATE 20012001
DATE 19991999
ED&TC 19971997
DAC 19891989
DAC 19871987

Wrote 14 papers:

DATE-2009-WangM #using
An accurate interconnect thermal model using equivalent transmission line circuit (BW, PM), pp. 280–283.
DATE-2006-WangM #algorithm #analysis #multi
A logarithmic full-chip thermal analysis algorithm based on multi-layer Green’s function (BW, PM), pp. 39–44.
DATE-2005-WangM #approximate #modelling
EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation (BW, PM), pp. 976–981.
DAC-2004-DingM #logic #novel
A novel technique to improve noise immunity of CMOS dynamic logic circuits (LD, PM), pp. 900–903.
DATE-2003-DingM #logic #modelling
Modeling Noise Transfer Characteristic of Dynamic Logic Gates (LD, PM), pp. 11114–11117.
DATE-2002-DingM #performance
Optimal Transistor Tapering for High-Speed CMOS Circuits (LD, PM), pp. 708–713.
DATE-2002-DingM02a #modelling #using
Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling (LD, PM), pp. 1038–1043.
DATE-2002-XuM #matrix
Formulation of Low-Order Dominant Poles for Y-Matrix of Interconnects (QX, PM), pp. 820–825.
DATE-2001-XuM #difference #modelling #performance #using
Efficient and passive modeling of transmission lines by using differential quadrature method (QX, PM), pp. 437–444.
DATE-1999-ChakrabortyGBKM #design #physics #self
A Physical Design Tool for Built-in Self-Repairable Static RAMs (KC, AG, MB, SK, PM), p. 714–?.
EDTC-1997-ChakrabortyM #bound #functional #parallel #programmable #testing
A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs (KC, PM), pp. 330–334.
EDAC-1994-EsbensenM #algorithm #graph #problem #search-based
A Genetic Algorithm for the Steiner Problem in a Graph (HE, PM), pp. 402–406.
DAC-1989-YihM #clustering #design #network
A Neural Network Design for Circuit Partitioning (JSY, PM), pp. 406–411.
DAC-1987-MazumderPF #algorithm #design #parallel #random #testing
Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories (PM, JHP, WKF), pp. 689–694.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.