Travelled to:3 × USA
Collaborated with:S.A.Mahlke M.L.Chu M.Kudlur K.Fan N.Clark P.D.Nagarkar G.S.Dasika E.D.Marsman R.M.Senger R.B.Brown
Talks about:compil (2) power (2) manag (2) cach (2) low (2) processor (1) placement (1) foresight (1) instruct (1) datapath (1)
Person: Rajiv A. Ravindran
DBLP: Ravindran:Rajiv_A=
Contributed to:
2007
20052004Wrote 3 papers:
- LCTES-2007-RavindranCM #power management
- Compiler-managed partitioned data caches for low power (RAR, MLC, SAM), pp. 237–247.
- CGO-2005-RavindranNDMSMB #compilation #power management
- Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache (RAR, PDN, GSD, EDM, RMS, SAM, RBB), pp. 179–190.
- CGO-2004-KudlurFCRCM #heuristic #named #scheduling
- FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths (MK, KF, MLC, RAR, NC, SAM), pp. 201–212.