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Travelled to:
1 × USA
Collaborated with:
R.A.Rutenbar R.E.Bryant
Talks about:
simul (2) multiprocessor (1) placement (1) parallel (1) feasibl (1) switch (1) massiv (1) anneal (1) studi (1) level (1)

Person: Saul A. Kravitz

DBLP DBLP: Kravitz:Saul_A=

Contributed to:

DAC 19891989
DAC 19861986

Wrote 2 papers:

DAC-1989-KravitzBR #parallel #simulation
Massively Parallel Switch-Level Simulation: A Feasibility Study (SAK, REB, RAR), pp. 91–97.
DAC-1986-KravitzR #multi
Multiprocessor-based placement by simulated annealing (SAK, RAR), pp. 567–573.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.