Travelled to:2 × France
Collaborated with:A.Glebov V.Zolotov C.Oh R.Panda M.R.Becer S.Rusakov D.Blaauw L.G.Jones G.Vijayan
Talks about:circuit (2) analysi (1) static (1) domino (1) calcul (1) power (1) digit (1) nois (1) loss (1) fast (1)
Person: Sergey Gavrilov
DBLP: Gavrilov:Sergey
Contributed to:
20041997Wrote 2 papers:
- DATE-v2-2004-GlebovGZOPB #analysis
- False-Noise Analysis for Domino Circuits (AG, SG, VZ, CO, RP, MRB), pp. 784–789.
- EDTC-1997-GavrilovGRBJV #performance
- Fast power loss calculation for digital static CMOS circuits (SG, AG, SR, DB, LGJ, GV), pp. 411–415.