Travelled to:3 × USA
Collaborated with:N.Kawato T.Saito F.Maruyama W.M.v.Cleemput S.Hirose
Talks about:design (3) techniqu (2) system (2) verif (2) logic (2) base (2) synthesi (1) interact (1) function (1) hardwar (1)
Person: Takao Uehara
DBLP: Uehara:Takao
Contributed to:
198219811979Wrote 5 papers:
- DAC-1982-KawatoUHS #interactive #logic #synthesis
- An interactive logic synthesis system based upon AI techniques (NK, TU, SH, TS), pp. 858–864.
- DAC-1982-MaruyamaUKS #design #hardware #verification
- A verification technique for hardware designs (FM, TU, NK, TS), pp. 832–841.
- DAC-1981-SaitoUK #design #logic
- A CAD system for logic design based on frames and demons (TS, TU, NK), pp. 451–456.
- DAC-1979-KawatoSMU #design #scalability #using #verification
- Design and verification of large-scale computers by using DDL (NK, TS, FM, TU), pp. 360–366.
- DAC-1979-UeharaC #array #functional #layout
- Optimal layout of CMOS functional arrays (TU, WMvC), pp. 287–289.