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Travelled to:
9 × USA
Collaborated with:
∅ J.G.Linders T.C.Bennett K.R.Stevens T.S.Payne S.Kang W.E.Cory D.D.Hill B.Preas T.Uehara T.Blank M.Stefik R.F.Allum J.A.Hupp
Talks about:
circuit (4) design (4) descript (3) system (3) layout (3) algorithm (2) structur (2) interact (2) hierarch (2) problem (2)

Person: William M. van Cleemput

DBLP DBLP: Cleemput:William_M=_van

Contributed to:

DAC 19821982
DAC 19811981
DAC 19801980
DAC 19791979
DAC 19781978
DAC 19771977
DAC 19761976
DAC 19751975
DAC 19741974

Wrote 14 papers:

DAC-1982-PayneC #automation #clustering
Automated partitioning of hierarchically specified digital systems (TSP, WMvC), pp. 182–192.
DAC-1981-BlankSC #algorithm #architecture #parallel
A parallel bit map processor architecture for DA algorithms (TB, MS, WMvC), pp. 837–845.
DAC-1981-KangC #automation #synthesis
Automatic PLA synthesis from a DDL-P description (SK, WMvC), pp. 391–397.
DAC-1980-CoryC #correctness #design #verification
Developments in verification of design correctness (WEC, WMvC), pp. 156–164.
DAC-1979-BennettSC #design #editing #interactive
Dynamic design rule checking in an interactive printed circuit editor (TCB, KRS, WMvC), pp. 330–336.
DAC-1979-Cleemput #hardware
Computer hardware description languages and their applications (WMvC), pp. 554–560.
DAC-1979-HillC #generative #multi #named #simulation
SABLE: A tool for generating structured, multi-level simulations (DDH, WMvC), pp. 272–279.
DAC-1979-PreasC #algorithm
Placement algorithms for arbitrarily shaped blocks (BP, WMvC), pp. 474–480.
DAC-1979-UeharaC #array #functional #layout
Optimal layout of CMOS functional arrays (TU, WMvC), pp. 287–289.
DAC-1978-StevensCBH #design #implementation #interactive
Implementation of an interactive printed circuit design system (KRS, WMvC, TCB, JAH), pp. 74–81.
DAC-1977-Cleemput
An hierarchical language for the structural description of digital systems (WMvC), pp. 377–385.
DAC-1976-Cleemput #aspect-oriented #layout #on the #problem
On the topological aspects of the circuit layout problem (WMvC), pp. 441–450.
DAC-1975-CleemputAL #automation #design #on the
On the status of design automation in canada (WMvC, RFA, JGL), pp. 1–7.
DAC-1974-CleemputL #formal method #graph #layout #problem
An improved graph-theoretic model for the circuit layout problem (WMvC, JGL), pp. 82–90.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.