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Travelled to:
3 × USA
Collaborated with:
S.X.Tan X.Huang T.Yu H.Chen T.Kim V.Joshi A.Torres K.Agarwal D.Sylvester D.Blaauw
Talks about:
interconnect (2) model (2) electromigr (1) reliabl (1) network (1) analysi (1) stress (1) physic (1) mechan (1) layout (1)

Person: Valeriy Sukharev

DBLP DBLP: Sukharev:Valeriy

Contributed to:

DAC 20152015
DAC 20142014
DAC 20102010

Wrote 3 papers:

DAC-2015-ChenTSHK #analysis #modelling #multi #reliability
Interconnect reliability modeling and analysis for multi-branch interconnect trees (HBC, SXDT, VS, XH, TK), p. 6.
DAC-2014-HuangYST #assessment #grid #network #power management
Physics-based Electromigration Assessment for Power Grid Networks (XH, TY, VS, SXDT), p. 6.
DAC-2010-JoshiSTASB #modelling
Closed-form modeling of layout-dependent mechanical stress (VJ, VS, AT, KA, DS, DB), pp. 673–678.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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