Travelled to:2 × USA
Collaborated with:S.S.Sapatnekar Y.Chen D.J.Lilja J.Singh Z.Luo
Talks about:microarchitectur (1) floorplan (1) function (1) approach (1) statist (1) program (1) pipelin (1) geometr (1) correct (1) circuit (1)
Person: Vidyasagar Nookala
DBLP: Nookala:Vidyasagar
Contributed to:
20052004Wrote 3 papers:
- DAC-2005-NookalaCLS #approach #architecture #design #statistics #using
- Microarchitecture-aware floorplanning using a statistical design of experiments approach (VN, YC, DJL, SSS), pp. 579–584.
- DAC-2005-SinghNLS #geometry #programming #robust
- Robust gate sizing by geometric programming (JS, VN, ZQL, SSS), pp. 315–320.
- DAC-2004-NookalaS
- A method for correcting the functionality of a wire-pipelined circuit (VN, SSS), pp. 570–575.