Collaborated with:
C.X.0001 X.Ma J.L.0001 H.Chen W.Dou F.Qin D.Chen Y.Shen P.Y.0002 T.Gu C.Cao Y.Yang Z.Z.0002 Y.Wang H.Sun H.Lu Y.Zhou B.Xu
Talks about:
multithread (1) understand (1) transform (1) synthesi (1) softwar (1) regular (1) program (1) express (1) coverag (1) control (1)
Person: Yanyan Jiang 0001
DBLP: 0001:Yanyan_Jiang
Contributed to:
Wrote 5 papers:
- ASE-2018-Shen000ML #named #regular expression
- ReScue: crafting regular expression DoS attacks (YS, YJ0, CX0, PY0, XM, JL0), pp. 225–235.
- ESEC-FSE-2018-Chen00M0 #concurrent #parallel #source code #testing #thread
- Testing multithreaded programs via thread speed control (DC, YJ0, CX0, XM, JL0), pp. 15–25.
- ASE-2019-ChenD0Q #comprehension #debugging #scalability
- Understanding Exception-Related Bugs in Large-Scale Cloud Systems (HC, WD, YJ0, FQ), pp. 339–351.
- ASE-2019-YangJ0WSLZX #automation #self #test coverage
- Automatic Self-Validation for Code Coverage Profilers (YY, YJ0, ZZ0, YW, HS, HL, YZ, BX), pp. 79–90.
- ECOOP-2018-GuM00CL #automation #execution #online #synthesis
- Automating Object Transformations for Dynamic Software Updating via Online Execution Synthesis (TG, XM, CX0, YJ0, CC, JL0), p. 28.