Travelled to:1 × Korea
2 × Germany
Collaborated with:C.Yang P.Wang M.Tsai Y.Chen R.Chang W.Hung Y.Chang A.P.Su
Talks about:synthesi (2) memori (2) chip (2) awar (2) architectur (1) reconfigur (1) processor (1) placement (1) algorithm (1) scenario (1)
Person: Yi-Jung Chen
DBLP: Chen:Yi=Jung
Contributed to:
20142010
2007Wrote 3 papers:
- DATE-2014-TsaiCCC #3d #configuration management #memory management #multi
- Scenario-aware data placement and memory area allocation for Multi-Processor System-on-Chips with reconfigurable 3D-stacked SRAMs (MLT, YJC, YTC, RHC), pp. 1–6.
- DATE-2010-ChenYW #memory management #named
- PM-COSYN: PE and memory co-synthesis for MPSoCs (YJC, CLY, PHW), pp. 1590–1595.
- SAC-2007-HungCYCS #algorithm #architecture #design #energy
- An architectural co-synthesis algorithm for energy-aware network-on-chip design (WHH, YJC, CLY, YSC, APS), pp. 680–684.