Travelled to:2 × Germany
2 × USA
Collaborated with:D.Sullivan ∅ D.Maliuk Y.Makris X.Guo R.G.Dutta F.Farahmandi P.Mishra J.Biggers G.Zhu S.Zhang Y.Liu S.Hu J.Wu Y.Shi Y.Hu X.Li L.Davi M.Hanreich D.Paul A.Sadeghi P.Koeberl O.Arias
Talks about:trust (3) evalu (3) hardwar (2) integr (2) secur (2) trustworthi (1) cyberattack (1) cryptograph (1) wireless (1) properti (1)
Person: Yier Jin
DBLP: Jin:Yier
Contributed to:
20152014
20142012Wrote 7 papers:
- DAC-2015-DaviHPSKSAJ #named
- HAFIX: hardware-assisted flow integrity extension (LD, MH, DP, ARS, PK, DS, OA, YJ), p. 6.
- DAC-2015-GuoDJFM #formal method #perspective #security #validation #verification
- Pre-silicon security verification and validation: a formal perspective (XG, RGD, YJ, FF, PM), p. 6.
- DAC-2015-LiuHWSJHL #assessment #detection #smarttech
- Impact assessment of net metering on smart home cyberattack detection (YL, SH, JW, YS, YJ, YH, XL), p. 6.
- DAC-2014-SullivanBZZJ #functional #hardware #identification #named
- FIGHT-Metric: Functional Identification of Gate-Level Hardware Trustworthiness (DS, JB, GZ, SZ, YJ), p. 4.
- DATE-2014-Jin #evaluation #proving #security #tool support #trust
- EDA tools trust evaluation through security property proofs (YJ), pp. 1–4.
- DATE-2014-JinS #evaluation #realtime #trust
- Real-time trust evaluation in integrated circuits (YJ, DS), pp. 1–6.
- DATE-2012-JinMM #encryption #evaluation #trust
- Post-deployment trust evaluation in wireless cryptographic ICs (YJ, DM, YM), pp. 965–970.