BibSLEIGH corpus
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Used together with:
decod (12)
base (4)
architectur (3)
chip (3)
read (3)

Stem turbo$ (all stems)

25 papers:

DACDAC-2015-ChenMRC #execution #paradigm #performance
Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks (HC, DM, SR, KC), p. 6.
HPCAHPCA-2015-NairCRQ #latency #memory management
Reducing read latency of phase change memory via early read and Turbo Read (PJN, CCC, BR, MKQ), pp. 309–319.
HPCAHPCA-2014-LoK #manycore
Dynamic management of TurboMode in modern multi-core chips (DL, CK), pp. 603–613.
DATEDATE-2013-MurugappaBJ #multi #standard
Parameterized area-efficient multi-standard turbo decoder (PM, AB, MJ), pp. 109–114.
KDDKDD-2013-HanLPL0KY #graph #named #parallel #performance
TurboGraph: a fast parallel graph engine handling billion-scale graphs in a single PC (WSH, SL, KP, JHL, MSK, JK, HY), pp. 77–85.
DATEDATE-2012-CondoMM #architecture
A Network-on-Chip-based turbo/LDPC decoder architecture (CC, MM, GM), pp. 1525–1530.
TOOLSTOOLS-EUROPE-2012-ZhengAMSBVTQM #bytecode #partial evaluation
Turbo DiSL: Partial Evaluation for High-Level Bytecode Instrumentation (YZ, DA, LM, AS, WB, AV, PT, ZQ, MM), pp. 353–368.
CASECASE-2011-ParkCH #design #hybrid
Design and control for hybrid magnetic thrust bearing for turbo refrigerant compressor (CHP, SKC, SYH), pp. 792–797.
DATEDATE-2011-MurugappaABJ #architecture #flexibility #multi #throughput
A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding (PM, RAK, AB, MJ), pp. 228–233.
DATEDATE-2011-ReddyCBJ #complexity #power management
A low complexity stopping criterion for reducing power consumption in turbo decoders (PR, FC, AB, MJ), pp. 649–654.
A 150Mbit/s 3GPP LTE Turbo code decoder (MM, TI, NW, WR), pp. 1420–1425.
DATEDATE-2009-JafriKBJ #flexibility #linear
ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications (ARJ, DK, AB, MJ), pp. 1620–1625.
VLDBVLDB-2009-DobraJRX #convergence
Turbo-Charging Estimate Convergence in DBO (AD, CJ, FR, FX), pp. 419–430.
SACSAC-2009-LeeJKKKC #effectiveness #process
Shader space navigator: a turbo for an intuitive and effective shading process (JHL, MHJ, DYK, SWK, MHK, JSC), pp. 945–946.
DATEDATE-2008-VogtW #configuration management #set
A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment (TV, NW), pp. 38–43.
DATEDATE-2007-MoussaMBJ #communication #multi #network
Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding (HM, OM, AB, MJ), pp. 654–659.
DATEDATE-2006-MullerBJ #design #multi
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding (OM, AB, MJ), pp. 1330–1335.
DATEDATE-v2-2004-RosaPGL #configuration management #framework #implementation
Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform (ALR, CP, FG, LL), pp. 1218–1223.
DATEDATE-2003-GilbertTW #architecture #communication #embedded #multi
Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors (FG, MJT, NW), pp. 10356–10363.
DATEDATE-2001-DielissenMBHSHW #power management
Power-efficient layered turbo decoder processor (JD, JLvM, MB, FH, SS, JH, AvdW), pp. 246–251.
A 50 Mbit/s Iterative Turbo-Decoder (FV, GM, GP, MRR, MZ), pp. 176–180.
SIGMODSIGMOD-2000-ShenoyHSBBS #database #mining #scalability
Turbo-charging Vertical Mining of Large Databases (PS, JRH, SS, GB, MB, DS), pp. 22–33.
LCTESLCTES-1998-WeissFDFHJJRSS #compilation #java
TurboJ, a Java Bytecode-to-Native Compiler (MW, FdF, BD, CF, FH, EAJ, VJ, FR, FS, XS), pp. 119–130.
ITiCSEITiCSE-1996-Velazquez-Iturbide #functional #named #programming
HIPE: a Turbo-like environment for functional programming (JÁVI), p. 234.
ICLPILPS-1993-Hausman #erlang
Turbo Erlang (BH), p. 662.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.