BibSLEIGH — Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop

Kunhyuk Kang, Keejong Kim, Kaushik Roy
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
DAC, 2007.

DAC 2007

@inproceedings{DAC-2007-KangKR,
	author        = "Kunhyuk Kang and Keejong Kim and Kaushik Roy",
	booktitle     = "{Proceedings of the 44th Design Automation Conference}",
	doi           = "10.1145/1278480.1278710",
	pages         = "934--939",
	publisher     = "{IEEE}",
	title         = "{Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop}",
	year          = 2007,
}

Kunhyuk Kang, Keejong Kim, Kaushik RoyVariation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked LoopDAC, 2007.

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Kunhyuk Kang, Keejong Kim, Kaushik Roy
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
DAC, 2007.