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Travelled to:
3 × USA
Collaborated with:
K.Roy K.Kang J.P.Kulkarni S.P.Park S.Ghosh S.Mukhopadhyay A.E.Islam M.A.Alam
Talks about:
low (3) circuit (2) variat (2) power (2) sram (2) use (2) methodolog (1) character (1) techniqu (1) reliabl (1)

Person: Keejong Kim

DBLP DBLP: Kim:Keejong

Contributed to:

DAC 20082008
DAC 20072007
DAC 20062006

Wrote 4 papers:

DAC-2008-KulkarniKPR #array #process
Process variation tolerant SRAM array for ultra low voltage applications (JPK, KK, SPP, KR), pp. 108–113.
DAC-2007-KangKIAR #estimation #metric #online #reliability #using
Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement (KK, KK, AEI, MAA, KR), pp. 358–363.
DAC-2007-KangKR #design #power management #using
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop (KK, KK, KR), pp. 934–939.
DAC-2006-GhoshMKR #power management #reduction #self
Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM (SG, SM, KK, KR), pp. 971–976.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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