Assertion-Based Design Exploration of DVS in Network Processor Architectures
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Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
Assertion-Based Design Exploration of DVS in Network Processor Architectures
DATE, 2005.

DATE 2005
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@inproceedings{DATE-2005-YuWCHYB,
	author        = "Jia Yu and Wei Wu and Xi Chen and Harry Hsieh and Jun Yang and Felice Balarin",
	booktitle     = "{Proceedings of the Ninth Conference on Design, Automation and Test in Europe}",
	doi           = "10.1109/DATE.2005.69",
	isbn          = "0-7695-2288-2",
	pages         = "92--97",
	publisher     = "{IEEE Computer Society}",
	title         = "{Assertion-Based Design Exploration of DVS in Network Processor Architectures}",
	year          = 2005,
}

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