System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs
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Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs
DATE, 2013.

DATE 2013
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@inproceedings{DATE-2013-0001WAWG,
	acmid         = "2485348",
	author        = "Karthik Chandrasekar and Christian Weis and Benny Akesson and Norbert Wehn and Kees Goossens",
	booktitle     = "{Proceedings of the 17th Conference on Design, Automation and Test in Europe}",
	isbn          = "978-1-4503-2153-2",
	pages         = "236--241",
	publisher     = "{EDA Consortium San Jose, CA, USA / ACM DL}",
	title         = "{System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs}",
	year          = 2013,
}

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