Width minimization in the Single-Electron Transistor array synthesis
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
Width minimization in the Single-Electron Transistor array synthesis
DATE, 2014.

DATE 2014
DBLP
Scholar
DOI
Full names Links ISxN
@inproceedings{DATE-2014-LiuCHWCDN,
	author        = "Chian-Wei Liu and Chang-En Chiang and Ching-Yi Huang and Chun-Yao Wang and Yung-Chih Chen and Suman Datta and Vijaykrishnan Narayanan",
	booktitle     = "{Proceedings of the 18th Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.7873/DATE.2014.135",
	pages         = "1--4",
	publisher     = "{IEEE}",
	title         = "{Width minimization in the Single-Electron Transistor array synthesis}",
	year          = 2014,
}

Tags:



Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.