Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits
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Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits
DATE, 2004.

DATE v1 2004
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@inproceedings{DATE-v1-2004-RaudvereSSJ,
	author        = "Tarvo Raudvere and Ashish Kumar Singh and Ingo Sander and Axel Jantsch",
	booktitle     = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Volume 1}",
	doi           = "10.1109/DATE.2004.1268933",
	isbn          = "0-7695-2085-5",
	pages         = "690--691",
	publisher     = "{IEEE Computer Society}",
	title         = "{Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits}",
	year          = 2004,
}

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