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Travelled to:
1 × France
Collaborated with:
A.K.Singh I.Sander A.Jantsch
Talks about:
implement (1) sequenti (1) polynomi (1) abstract (1) circuit (1) combin (1) verif (1)

Person: Tarvo Raudvere

DBLP DBLP: Raudvere:Tarvo

Contributed to:

DATE v1 20042004

Wrote 1 papers:

DATE-v1-2004-RaudvereSSJ #abstraction #polynomial #verification
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits (TR, AKS, IS, AJ), pp. 690–691.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.