Proceedings of the First Symposium on High-Performance Computer Architecture
HPCA, 1995.
@proceedings{HPCA-1995, address = "Raleigh, North Carolina, USA", ee = "http://www.computer.org/csdl/proceedings/hpca/1995/6445/00/index.html", isbn = "0-8186-6445-2", publisher = "{IEEE Computer Society}", title = "{Proceedings of the First Symposium on High-Performance Computer Architecture}", year = 1995, }
Contents (36 items)
- HPCA-1995-NuthD #implementation #performance
- The Named-State Register File: Implementation and Performance (PRN, WJD), pp. 4–13.
- HPCA-1995-Weiss #implementation #multi #queue
- Implementing Register Interlocks in Parallel-Pipeline Multiple Instruction Queue, Superscalar Processors (SW), pp. 14–21.
- HPCA-1995-LlosaVA
- Non-Consistent Dual Register Files to Reduce Register Pressure (JL, MV, EA), pp. 22–31.
- HPCA-1995-QiaoM #communication #latency #multi
- Reducing Communication Latency with Path Multiplexing in Optically Interconnected Multiprocessor Systems (CQ, RGM), pp. 34–43.
- HPCA-1995-CappelloG #communication #network #performance #towards
- Toward High Communication Performance through Compiled Communications on a Circuit Switched Interconnection Network (FC, CG), pp. 44–53.
- HPCA-1995-SivasubramaniamSRV #locality #network #parallel
- Abstracting Network Characteristics and Locality Properties of Parallel Systems (AS, AS, UR, HV), pp. 54–63.
- HPCA-1995-DahlgrenS #effectiveness #multi
- Effectiveness of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors (FD, PS), pp. 68–77.
- HPCA-1995-FarkasJC #execution #how #multi #question
- How Useful Are Non-Blocking Loads, Stream Buffers and Speculative Execution in Multiple Issue Processors? (KIF, NPJ, PC), pp. 78–89.
- HPCA-1995-CitronR #using
- Creating a Wider Bus Using Caching Techniques (DC, LR), pp. 90–99.
- HPCA-1995-Libeskind-HadasB #fault tolerance
- Origin-Based Fault-Tolerant routing in the Mesh (RLH, EB), pp. 102–111.
- HPCA-1995-UpadhyayVM #2d #adaptation #performance
- Efficient and Balanced Adaptive Routing in Two-Dimensional Meshes (JU, VV, PM), pp. 112–121.
- HPCA-1995-CunninghamA #2d #adaptation #fault tolerance
- Fault-Tolerant Adaptive Routing for Two-Dimensional Meshes (CMC, DRA), pp. 122–131.
- HPCA-1995-Seznec
- DASC Cache (AS), pp. 134–143.
- HPCA-1995-TheobaldHG #design #hybrid
- A Design Frame for Hybrid Access Caches (KBT, HHJH, GRG), pp. 144–153.
- HPCA-1995-TemamD
- Software Assistance for Data Caches (OT, ND), pp. 154–163.
- HPCA-1995-BouraD #modelling
- Modeling Virtual Channel Flow Control in Hypercubes (YMB, CRD), pp. 166–175.
- HPCA-1995-SterlingSMG #evaluation
- An Initial Evaluation of the Convex SPP-1000 for Earth and Space Science Application (TLS, DS, PM, JPG), pp. 176–185.
- HPCA-1995-TreiberM #design #simulation
- Simulation Study of Cached RAID5 Designs (KT, JM), pp. 186–197.
- HPCA-1995-Panda #multi #network #performance
- Fast Barrier Synchronization in Wormhole k-ary n-cube Networks with Multidestination Worms (DKP), pp. 200–209.
- HPCA-1995-FiskeD #concurrent #parallel #scheduling #thread
- Thread Prioritization: A Thread Scheduling Mechanism for Multiple-Context Parallel Processors (SF, WJD), pp. 210–221.
- HPCA-1995-MichaelS #distributed #implementation #memory management #multi
- Implementation of Atomic Primitives on Distributed Shared Memory Multiprocessors (MMM, MLS), pp. 222–231.
- HPCA-1995-WesterholzHPH #memory management #performance
- Improving Performance by Cache Driven Memory Management (KW, SH, JP, CH), pp. 234–242.
- HPCA-1995-KimMJAJK #effectiveness #named #problem
- U-Cache: A Cost-Effective Solution to the Synonym Problem (JK, SLM, SJ, BA, DKJ, CSK), pp. 243–252.
- HPCA-1995-McKeeW
- Access Ordering and Memory-Conscious Cache Utilization (SAM, WAW), pp. 253–262.
- HPCA-1995-AndersonB #multi #performance
- Two Techniques for Improving Performance on Bus-Based Multiprocessors (CA, JLB), pp. 264–275.
- HPCA-1995-SaulsburyWCL
- An Argument for Simple COMA (AS, TW, JBC, AL), pp. 276–285.
- HPCA-1995-KontothanassisS #multi #scalability
- Software Cache Coherence for Large Scale Multiprocessors (LIK, MLS), pp. 286–295.
- HPCA-1995-GovindarajanNL #architecture #design #evaluation #parallel #performance #thread
- Design and Performance Evaluation of a Multithreaded Architecture (RG, SSN, PL), pp. 298–307.
- HPCA-1995-KawanoKTA #architecture #parallel #thread
- Fine-Grain Multi-Thread Processor Architecture for Massively Parallel Processing (TK, SK, RiT, MA), pp. 308–317.
- HPCA-1995-LiC #parallel #thread
- The Effects of STEF in Finely Parallel Multithreaded Processors (YL, WC), pp. 318–325.
- HPCA-1995-SastryR #architecture #distance
- A VLSI Architecture for Computer the Tree-to-Tree Distance (RS, NR), pp. 330–339.
- HPCA-1995-HurSFOK #array #design #fault #logic #parallel #simulation
- Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation (YH, SAS, ESF, GEO, SK), pp. 340–347.
- HPCA-1995-GargS #architecture #communication
- Architectural Support for Inter-Stream Communication in a MSIMD System (VG, DES), pp. 348–357.
- HPCA-1995-TorrellasXD #operating system #optimisation #performance
- Optimizing Instruction Cache Performance for Operating System Intensive Workloads (JT, CX, RLD), pp. 360–369.
- HPCA-1995-JohnRHC #architecture #performance
- Program Balance and Its Impact on High Performance RISC Architectures (LKJ, VR, PTH, LDC), pp. 370–379.
- HPCA-1995-Lee #memory management #order
- Memory Access Reordering in Vector Processors (DLL), pp. 380–389.
9 ×#performance
8 ×#multi
6 ×#parallel
5 ×#architecture
4 ×#design
4 ×#thread
3 ×#communication
3 ×#implementation
3 ×#memory management
3 ×#network
8 ×#multi
6 ×#parallel
5 ×#architecture
4 ×#design
4 ×#thread
3 ×#communication
3 ×#implementation
3 ×#memory management
3 ×#network