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Travelled to:
1 × India
1 × Mexico
1 × Spain
1 × United Kingdom
9 × USA
Collaborated with:
S.Seo J.Kim Z.Sura J.Lee Y.Solihin C.Jang S.P.Midkiff D.A.Padua H.Cho B.Egger S.Han G.Jo J.Kim H.Kim S.Bak J.Torrellas S.Kim H.Kim J.H.Lee H.Shin C.Jung D.Lim M.Kharbutli K.Irwin J.Jung Pyeongseok Oh Jiyoung Park Wookeun Jung J.Nah X.Fang C.Wong K.Kim H.Kim D.Yoo S.Kim H.Kim S.Ryu Z.Manna N.Bjørner A.Browne E.Y.Chang M.Colón L.d.Alfaro H.Devarajan A.Kapur H.Sipma T.E.Uribe
Talks about:
memori (5) architectur (4) techniqu (4) multicor (3) program (3) manag (3) open (3) data (3) heterogen (2) softwar (2)

Person: Jaejin Lee

DBLP DBLP: Lee:Jaejin

Facilitated 1 volumes:

LCTES 2010Ed

Contributed to:

LCTES 20142014
CGO 20122012
PPoPP 20122012
LCTES 20112011
PPoPP 20112011
HPCA 20102010
HPCA 20092009
LCTES 20082008
LCTES 20072007
PPoPP 20052005
HPCA 20042004
HPCA 20012001
PPoPP 19991999
TAPSOFT CAAP/FASE 19951995
PLDI 20162016
ASPLOS 20192019

Wrote 17 papers:

LCTES-2014-KimBL #concurrent #garbage collection #javascript #lightweight
Lightweight and block-level concurrent sweeping for javascript garbage collection (HK, SB, JL), pp. 155–164.
CGO-2012-JangLSL #automation #memory management #multi
An automatic code overlaying technique for multicores with explicitly-managed memory hierarchies (CJ, JL, SS, JL), pp. 219–229.
PPoPP-2012-KimSLNJL #clustering #cpu #gpu #programming
OpenCL as a unified programming model for heterogeneous CPU/GPU clusters (JK, SS, JL, JN, GJ, JL), pp. 299–300.
LCTES-2011-JangKLKYKKR #architecture #clustering #configuration management
An instruction-scheduling-aware data partitioning technique for coarse-grained reconfigurable architectures (CJ, JK, JL, HSK, DY, SK, HK, SR), pp. 151–160.
PPoPP-2011-KimKLL #image #multi
Achieving a single compute device image in OpenCL for multiple GPUs (JK, HK, JHL, JL), pp. 277–288.
HPCA-2010-LeeLSKKS #clustering #manycore
COMIC++: A software SVM system for heterogeneous multicore accelerator clusters (JL, JL, SS, JK, SK, ZS), pp. 1–12.
HPCA-2009-SeoLS #design #implementation #memory management #multi
Design and implementation of software-managed caches for multicores with local memory (SS, JL, ZS), pp. 55–66.
LCTES-2008-LeeKJKEKH #architecture #embedded #named #performance
FaCSim: a fast and cycle-accurate architecture simulator for embedded systems (JL, JK, CJ, SK, BE, KK, SH), pp. 89–100.
LCTES-2007-ChoELS #memory management
Dynamic data scratchpad memory management for a memory subsystem with an MMU (HC, BE, JL, HS), pp. 195–206.
PPoPP-2005-JungLLH #adaptation #architecture #execution #multi #smt
Adaptive execution techniques for SMT multiprocessor architectures (CJ, DL, JL, SH), pp. 236–246.
PPoPP-2005-SuraFWMLP #compilation #consistency #java #performance #source code
Compiler techniques for high performance sequentially consistent java programs (ZS, XF, CLW, SPM, JL, DAP), pp. 2–13.
HPCA-2004-KharbutliISL #using
Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses (MK, KI, YS, JL), pp. 288–299.
HPCA-2001-LeeST #architecture #automation #memory management
Automatically Mapping Code on an Intelligent Memory Architecture (JL, YS, JT), pp. 121–132.
PPoPP-1999-LeePM #algorithm #compilation #parallel #source code
Basic Compiler Algorithms for Parallel Programs (JL, DAP, SPM), pp. 1–12.
TAPSOFT-1995-MannaBBCCADKLSU #named #proving
STeP: The Stanford Temporal Prover (ZM, NB, AB, EYC, MC, LdA, HD, AK, JL, HS, TEU), pp. 793–794.
PLDI-2016-KimJJKL #distributed #framework #replication #using
A distributed OpenCL framework using redundant computation and data replication (JK, GJ, JJ, JK, JL), pp. 553–569.
ASPLOS-2019-ChoOPJL #learning #named
FA3C: FPGA-Accelerated Deep Reinforcement Learning (HC, PO, JP, WJ, JL), pp. 499–513.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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