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Travelled to:
1 × France
1 × USA
Collaborated with:
S.Foroutan F.Pétrot I.M.Panades A.Greiner
Talks about:
architectur (1) comparison (1) implement (1) asynchron (1) systemat (1) synchron (1) interfac (1) network (1) between (1) memori (1)

Person: Abbas Sheibanyrad

DBLP DBLP: Sheibanyrad:Abbas

Contributed to:

DAC 20122012
DATE 20072007

Wrote 2 papers:

DAC-2012-ForoutanSP #3d #interface #low cost #using
Cost-efficient buffer sizing in shared-memory 3D-MPSoCs using wide I/O interfaces (SF, AS, FP), pp. 366–375.
DATE-2007-SheibanyradPG #architecture #comparison #implementation #multi #network
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture (AS, IMP, AG), pp. 1090–1095.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.