Travelled to:2 × USA
Collaborated with:S.Bhunia Y.Zheng S.Ray J.Yang
Talks about:silicon (1) identif (1) current (1) correct (1) analysi (1) toward (1) robust (1) recycl (1) modern (1) design (1)
Person: Abhishek Basak
DBLP: Basak:Abhishek
Contributed to:
20152014Wrote 2 papers:
- DAC-2015-RayYBB #correctness #design #security #validation
- Correctness and security at odds: post-silicon validation of modern SoC designs (SR, JY, AB, SB), p. 6.
- DAC-2014-ZhengBB #analysis #identification #named #robust #towards
- CACI: Dynamic Current Analysis Towards Robust Recycled Chip Identification (YZ, AB, SB), p. 6.