Travelled to:2 × Germany
5 × USA
Collaborated with:K.Hao F.Xie J.Yang W.A.H.Jr. Z.Yang A.Basak S.Bhunia K.Cong L.Lei
Talks about:behavior (5) synthesi (4) equival (4) check (4) pipelin (3) design (2) optim (2) implement (1) framework (1) function (1)
Person: Sandip Ray
DBLP: Ray:Sandip
Contributed to:
20152014
2014201320122010
2004Wrote 7 papers:
- DAC-2015-RayYBB #correctness #design #security #validation
- Correctness and security at odds: post-silicon validation of modern SoC designs (SR, JY, AB, SB), p. 6.
- DAC-2014-YangHCLRX #behaviour #certification #framework #scalability #synthesis
- Scalable Certification Framework for Behavioral Synthesis Front-End (ZY, KH, KC, LL, SR, FX), p. 6.
- DATE-2014-HaoRX #behaviour #equivalence #pipes and filters #synthesis
- Equivalence checking for function pipelining in behavioral synthesis (KH, SR, FX), pp. 1–6.
- DAC-2013-YangRHX #behaviour #design #equivalence #implementation #optimisation #synthesis
- Handling design and implementation optimizations in equivalence checking for behavioral synthesis (ZY, SR, KH, FX), p. 6.
- DAC-2012-HaoRX #behaviour #equivalence #pipes and filters
- Equivalence checking for behaviorally synthesized pipelines (KH, SR, FX), pp. 344–349.
- DATE-2010-HaoXRY #behaviour #equivalence #optimisation #synthesis
- Optimizing equivalence checking for behavioral synthesis (KH, FX, SR, JY), pp. 1500–1505.
- CAV-2004-RayH #deduction #first-order #pipes and filters #quantifier #using #verification
- Deductive Verification of Pipelined Machines Using First-Order Quantification (SR, WAHJ), pp. 31–43.