BibSLEIGH corpus
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Open Knowledge
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Travelled to:
4 × USA
Collaborated with:
W.P.Birmingham P.Suaris L.Mize S.Sripada C.Wolff Q.Wu
Talks about:
interfac (2) system (2) time (2) decomposit (1) recoveri (1) generat (1) machin (1) failur (1) design (1) verif (1)

Person: Ajay J. Daga

DBLP DBLP: Daga:Ajay_J=

Contributed to:

DAC 20022002
DAC 19971997
DAC 19941994
DAC 19901990

Wrote 4 papers:

DAC-2002-DagaMSWW #automation #generative
Automated timing model generation (AJD, LM, SS, CW, QW), pp. 146–151.
DAC-1997-DagaS #design #interface #verification
Interface Timing Verification Drives System Design (AJD, PS), pp. 240–245.
DAC-1994-DagaB #composition #interface #state machine
The Minimization and Decomposition of Interface State Machines (AJD, WPB), pp. 120–125.
Failure Recovery in the MICON System (AJD, WPB), pp. 686–691.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.