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Travelled to:
1 × Germany
1 × United Kingdom
6 × USA
Collaborated with:
J.Regehr J.Peterson P.Hudak G.D.Hager E.Eide J.Lepreau M.Boettcher B.M.Al-Hashimi M.Eyole G.Gabrielli M.Flatt L.Stoller S.L.P.Jones F.Henderson C.A.R.Hoare S.Marlow R.Chen A.Deligiannis D.Gilday D.Hoyes W.Keen A.Pathirane O.Shepherd P.Vrabel A.Zaidi A.Armstrong Thomas Bauereiss Brian Campbell 0001 K.E.Gray Robert M. Norton Prashanth Mundkur Mark Wassell Jon French Christopher Pulte S.Flur I.Stark Neel Krishnaswami P.Sewell
Talks about:
system (4) architectur (2) vision (2) static (2) semant (2) formal (2) design (2) guard (2) simd (2) isa (2)

Person: Alastair Reid

DBLP DBLP: Reid:Alastair

Contributed to:

DATE 20142014
ASPLOS 20042004
ICSE 20022002
PADL 20012001
OSDI 20002000
ICSE 19991999
PLDI 19991999
IFL 19981998
CAV (2) 20162016
OOPSLA 20172017
POPL 20192019

Wrote 11 papers:

DATE-2014-BoettcherAEGR #architecture
Advanced SIMD: Extending the reach of contemporary SIMD architectures (MB, BMAH, ME, GG, AR), pp. 1–4.
ASPLOS-2004-RegehrR #automation #embedded #named
HOIST: a system for automatically deriving static analyzers for embedded systems (JR, AR), pp. 133–143.
ICSE-2002-EideRRL #design pattern
Static and dynamic structure in design patterns (EE, AR, JR, JL), pp. 208–218.
PADL-2001-PetersonHRH #declarative #named #visual notation
FVision: A Declarative Language for Visual Tracking (JP, PH, AR, GDH), pp. 304–321.
OSDI-2000-ReidFSLE #component #composition #named
Knit: Component Composition for Systems Software (AR, MF, LS, JL, EE), pp. 347–360.
ICSE-1999-ReidPHH #design #domain-specific language #empirical #prototype #realtime
Prototyping Real-Time Vision Systems: An Experiment in DSL Design (AR, JP, GDH, PH), pp. 484–493.
PLDI-1999-JonesRHHM #exception #semantics
A Semantics for Imprecise Exceptions (SLPJ, AR, FH, CARH, SM), pp. 25–36.
IFL-1998-Reid #implementation
Putting the Spine Back in the Spineless Tagless G-Machine: An Implementation of Resumable Black-Holes (AR), pp. 186–199.
CAV-2016-ReidCDGHKPSVZ #verification
End-to-End Verification of Processors with ISA-Formal (AR, RC, AD, DG, DH, WK, AP, OS, PV, AZ), pp. 42–58.
OOPSLA-2017-Reid #architecture #specification #validation
Who guards the guards? formal validation of the Arm v8-m architecture specification (AR), p. 24.
POPL-2019-ArmstrongBCRGNM #semantics
ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS (AA, TB, BC0, AR, KEG, RMN, PM, MW, JF, CP, SF, IS, NK, PS), p. 31.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.