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Travelled to:
3 × USA
Collaborated with:
D.M.Wu E.K.Vida-Torku
Talks about:
circuit (2) multichip (1) qualiti (1) predict (1) coverag (1) justif (1) improv (1) effect (1) vogic (1) ratio (1)

Person: Charles E. Radke

DBLP DBLP: Radke:Charles_E=

Facilitated 2 volumes:

DAC 1983Ed
DAC 1982Ed

Contributed to:

DAC 19911991
DAC 19831983
DAC 19691969

Wrote 3 papers:

DAC-1991-WuR #effectiveness #evaluation
Delay Test Effectiveness Evaluation of LSSD-Based VLSI Vogic Circuits (DMW, CER), pp. 291–295.
DAC-1983-Vida-TorkuR #fault #multi #quality
Quality level and fault coverage for multichip modules (EKVT, CER), pp. 201–206.
DAC-1969-Radke #predict
A justification of, and an improvement on, a useful rule for predicting circuit-to-pin ratios (CER), pp. 257–267.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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